Dr. Anwar Bhasha Pattan

Professor

Personal Information
Years of Experience : 13 years
Email Id : anwarbhasha@bvrithyderabad.edu.in
Areas of Specialization : VLSI
Educational Qualification
UG Degree : B.Tech – Electronics and Control Engineering
PG Degree : M.Tech – VLSI System Design
Doctoral Degree : Low Power VLSI (ECE)
International Journal Publications
  1.  “Low Power and High Performance Structures for Fast Fourier Transform Processor”, International Journal of Computer Applications, Vol 132-No.10, December, 2015. ISSN: 0975-8887.
  2. “Fast Fourier Transform Architectures: A Survey and State of the Art”, International Journal on Electronics & Communication Technology, Vol 5, Issue 4, Version 1, Oct-Dec, 2014. ISSN: 2230-7109(online), 2230-9543(print)
  3.  “Design of Flood Warning System based on F-bus Protocol”, CiiT International Journal of Networking and Communication Engineering, Vol 4, No 15, December 2012. ISSN: 0974-9713.
  4.  “The Terminal System Design Based on hybrid RFID-GPS in vehicular communications”, International Journal of Modern Engineering Research IJMER, Vol. 2, Issue 4, July-August, 2012, pp-2316-2319, ISSN: 2249-6645.
  5.  “Implementation of VoIP Using Session Initiation Protocol”, CiiT International Journal of Networking and Communication Engineering, Vol 3, No 7, May 2011. ISSN: 0974-9713.
International Conference Publications
  1. “FPGA implementation of a 64 point radix-2 single path delay feedback FFT architecture”, International Academic and Research Conference 2015 (IARC India 2015) in support of UNESCO’s 70th anniversary celebrations during 9-10, October, 2015, Vijayawada and published in the Engineering Sciences International Research Journal, IMRF Journals, Vol.1, Issue.2, August, 2015. ISSN: 2320 – 4338.
  2.  “Complexity Analysis of an 8 point FFT Processor for different Butterfly Structures”, International conference on Electrical, Electronics and Instrumentation Engineering (ICEEI-Aug’2015), during 20-22, August, 2015, Colombo, Sri Lanka and published in the IJCEEE, Vol.3, Issue.2, August, 2015. ISSN: 2345 – 9603.
National Conference Publications
  1.  “FPGA implementation of an efficient radix-23 FFT algorithm”, National Conference on Emerging Trends in Information, Digital and Embedded Systems (NC’e-TIDES-15), on 28th Feb, 2015 at AITS, Rajampet. ISBN No: 978-1-926488-02-8.
  2.  “Design of MAC unit using Reversible Logic”, National Conference on Electrical Sciences (NCES-12), from 7th to 8th September, 2012 Organized by Department of EEE, AITS, Rajampet, YSR Dt.
  3.  “A Novel Technique to improve register file immunity against soft errors”, National Conference on Emerging Trends in Information, Digital and Embedded Systems (NC’e-TIDES-12), from 13th to 14th July, 2012 Organized by Department of ECE, AITS, Rajampet, YSR Dt.
  4.  “Bidirectional Barrel shifter Design using reversible gates for low power applications”, National level Conference on emerging trends in Computers, Electronics and Power Engineering (NCECEP-2012), from 1st to 2nd June, 2012 Organized by Audisankara College of Engineering and Technology, Gudur, Nellore Dt.
  5.  “Universal Remote Controller for Home Appliances”, National Conference on Assistive Technology, from 29th to 31st July, 2011 Organized by Padmasri Dr. B.V. Raju Institute of Technology, Vishnupur, Narsapur, Medak Dt.
  6.  “Design and Implementation of FFT Processor for OFDMA System Using FPGA”, Fourth National Conference on Digital Convergence, FNCDC 2011, on 16th April, 2011 Organized by RMK Engineering College, Tamil Nadu. ISBN: 978-81-920889-3-8.
  7.  “Black Box for Vehicle Diagnosis”, Fourth National Conference on Digital Convergence, FNCDC 2011, on 16th April, 2011 Organized by RMK Engineering College, Tamil Nadu. ISBN: 978-81-920889-3-8.
  8.  “Group elevator scheduling with advance information for normal and emergency modes”, National Conference on Advancement and future trends in VLSI Design, NCVD 2011, from 30th to 31st March, 2011 Organized by Dept of ECE, Kalasalingam University, Tamil Nadu.
  9.  “Design of On chip Bus with OCP Interface”, National Conference on Electronics and Communication Systems, on 16th March, 2011 Organized by MITS, Madanapalle.
  10.  “Low Cost Extendable Framework for embedded smart car security system”, National Conference on Recent trends in ECE, Elixir 2k10, from 8th to 9th December, 2010 Organized by Dept of ECE, SIETK, Puttur.
  11.  “Configurable Local link CRC Reference Design”, National Conference on Recent trends in ECE, Elixir 2k10, from 8th to 9th December, 2010 Organized by Dept of ECE, SIETK, Puttur.
  12.  “An Efficient Multiplier Design using Reversible Logic Gates”, National Conference on Advances in Communication Technologies, NCACT-2010, from 3rd to 4th December, 2010 Organized by Dept of ECE, GITAM University, Visakhapatnam.
  13.  “Design and simulation of Data to clock phase alignment”, National Conference on Future challenges and Building Intelligent Techniques in Electrical and Electronics Engineering, NCEEE-2010, from 29th to 30th July, 2010 Organized by Dept of EEE, Sathyabama University, Chennai.
  14. A paper on “Low Speed Buses in Embedded System Designs”, National Conference on Communication Technologies, NCComTech-2008, from 28th to 29th February, 2008 Organized by GVPCOE, Visakhapatnam.
Professional Memberships

Indian Society for Technical Education (ISTE) : LM57062

International Association of Computer Science and Information Technology (IACSIT), Singapore : 80342989

International Association of Engineers (IAENG), Hong Kong : 116371

Institute of Engineers, India (IEI) : AM099829-2

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