ELECTRONICS AND COMMUNICATION ENGINEERING

Ms. M. Praveena

Ms. M. Praveena

Associate Professor
praveena.m@bvrithyderabad.edu.in

AICTE ID: 1-2186307999
JNTUH ID: 51150402-101138
Ratified Status: Ratified

Ph.D.: –
M.Tech.: –
B.Tech.: –

Teaching Experience: 19 Years
Research Experience: Nil
Industry Experience: Nil

Scopus ID: 57194943334
WoS ID: AAY-7449-2021
Google Scholar ID: Aq9BmfsAAAAJ
Vidwan ID: 104368
ORCID ID: 0000000230471028

VLSI, Image processing, Optimization algorithms

Nil

  1. Praveena M, Sujatha B, TheerthaSree Y, Neelima D, Manasa Y, “Heart Rate Monitoring from ECG signal using Discrete Wavelet Transform”, Gradiva Review Journal, Volume 7, Issue 6, 2021, pp: 127-132.
  2. RadhaAbburi, Manne Praveena, R Priyakanth, “Tinkercad – A Web based Application for Virtual Labs to help Learners Think, Create and Make”, Journal of Engineering Education Transformations, Volume 34, January 2021, Special Issue, eISSN 2394-1707, pp: 535-541.
  3. R Priyakanth, RadhaAbburi, Manne Praveena, “Design and Impact of Interactive Video Content for the Improvement of Student Engagement and Learning”, Journal of Engineering Education Transformations, Volume 34, January 2021, Special Issue, eISSN 2394-1707, pp: 518-523.
  4. Praveena, N. Balaji, C. D. Naidu, “Hardware efficient Block Matching algorithm based on modified differential evolution optimization for fast motion estimation”, Analog Integrated Circuits and Signal Processing, Springer, August 2019, Volume 100, Issue 2, pp: 389-404.
  5. Manne Praveena, Dr. NarayanamBalaji, Dr. ChallaDhanunjaya Naidu, “FPGA Implementation of High Speed Medical Image Segmentation using Genetic Algorithm”, Journal of Theoretical and Applied Information Technology (JATIT), ISSN 1992 – 8645, 15th July 2017, Vol. 95, Issue No. 13,pp:2981-2988.
  6. Praveena, Dr. N. Balaji, Y. Sai Radhika, S. Vyshnavi, “VLSI Implementation of High Speed Optimized Image Segmentation using Parallel Prefix Adder”, International Journal of Emerging Trends in Engineering & Development (IJETED), ISSN 2249 – 6149, Issue 7, Vol. 3, May 2017, pp83-92,.
  7. Ch, Praveena.M, Priyanka.V, “FPGA Implementation of Lossless Compression of Medical Images Using VlSI – Oriented Felics Algorithm”, International Journal of Research in Information Technology (IJRIT), ISSN 2001-5569 Volume 1, Issue 12, December, 2013, Pg.264-273
  8. M Srinivas, M Praveena, “Design of a Modified Gabor Filter by Using Verilog HDL”, International Journal of Engineering Research and Applications (IJERA), ISSN: 2248- 9622, Vol. 2, Issue 3, May-Jun 2012, pp.3183-3187.
  1. Manne Praveena, EmbaddiSreyaswini, RallabandlaJyothi, VangaVyshnavi, VankudothKalyani; Step lock system in bus to avoid foot boarding. AIP Conf. Proc.8 July 2024; 3028 (1): 020059. https://doi.org/10.1063/5.0212680
  2. L. Gali, P. Manne and S. K. Veeramalla, “Structuring Hybrid Model Using Bilateral and Guided Filters for Image Denoising,” 2023 International Conference on Next Generation Electronics (NEleX), Vellore, India, 2023, pp. 1-7, doi: 10.1109/NEleX59773.2023.10421518.
  3. Geethasree, V., Sai Swapna Sri, C., Sravani, V., Bhaskari, K., Manne, P. (2023). A Survey on Image Processing Techniques for Detection of Cavities in Dental X-ray Images. In: Bindhu, V., Tavares, J.M.R.S., Vuppalapati, C. (eds) Proceedings of Fourth International Conference on Communication, Computing and Electronics Systems. Lecture Notes in Electrical Engineering, vol 977. Springer, Singapore. https://doi.org/10.1007/978-981-19-7753-4_61
  4. Manne Praveena, Rama Lakshmi Gali, Dr. V Hindumathi, “Improving Student Engagement & Learning using Formative Assessment Techniques”, Mini Symposium on Effective Practices in Teaching-Learning (EPTL) by Indo Universal Collaboration foe Engineering Education (IUCEE), 23rd& 24th April 2022.
  5. Manne Praveena, Rama Lakshmi Gali, V Hindumathi, “A Study on the Effectiveness of Formative Assessment Activities on Student Learning”, 6th International Conference on Advancements of Learning Methods in Teaching and Education (ICALMTE-2022), 6th& 7thMarch 2022.
  6. Manne Praveena, Dr. N Balaji, Dr. C D Naidu, “FPGA Design of Area Efficient, Superfast Motion Estimation using JAYA Optmization based Block Matching Algorithm”, Lecture Notes in Networks and Systems, 2023, 7th Series of International Conference on Information System Design & Intelligent Applications – INDIA-2022, 25th & 26th February, 2022.

1.      Published a patent titled “System for Footboard Avoidance in an Automobile and method related to the same thereof”, Application No. 202341068050, Date: 03/11/2023.

2.      Published a patent titled “Design of Wildlife Detection and Alerting system”, Application No. 202441072975, Date: 04/10/2024.

Nil

  • Life Member ISTE            LM62876
  • Life Member IETE           234467
  • Member IAENG               177677

Nil

Nil

Nil

Conferences Organized

  1. Co-Convener for International Conference on Micro Electronics, Electromagnetics & Telecommunications ICMEET 2k17, conducted at BVRIT Hyderabad College of Engineering for Women, on 9th and 10th

  2. Organizing member, Master of ceremony & prepared Souvenir for INDIA 2022 conference conducted on 25th& 26th February 2022.

FDPs – Conducted

  1. Organized and acted as Resource person for a Two Day online FDP on Virtual Labs “Fiddle with Virtual Components” on 4th& 5th September 2020 at BVRIT HYDERABAD College of Engineering for Women, Bachupally, Hyderabad.

  2. Organized a Faculty Development Program on “Full Custom IC Design and FPGA Design Flow” on 23rd – 25th February 2012 at VNR Vignana Jyothi Institute of Engineering & Technology, Hyderabad.

  3. Organized a 2-week Staff Development Program on “Real Time Signal and Image Processing “from 6th to 18th June 2011 at VNR Vignana Jyothi Institute of Engg & Tech, Hyderabad.

Workshops Organized

  1. Convener for a 2-day workshop on “Gaming Through Embedded Systems” conducted at BVRIT Hyderabad College of Engineering for Women in association with Jay Robotix Pvt Ltd. from 25th – 27thFebruary 2015.

FDPs – Attended

  1. Attended One week Professional Development Program on “Recent Advances in Signal Processing” by IEEE BVRIT HYDERABAD student branch under IEEE BVRITH SPS chapter in association during 25th to 29th November 2024.

  2. Participated and completed ATAL FDP on “The Revolution of Large Language Models(LLMs) in Artificial Intelligence” at VidyaJyothi Institute of Technology from 18th to 23rd November 2024.

  3. Participated in One week National level FDP on “Assimilation of Indian Knowledge Systems with NEP-2020: Prospect and Retrospect” from 30th July to 4th August 2024 organized by Department of BS&H and IQAC, BVRIT HYDERABAD College of Engineering for Women.

  4. Participated in a Five Day Virtual FDP on “Future Challenges in 6G”, organized by Dept. of Wireless Communication, SIMATS Engineering, Chennai from 4th to 8th March 2024.

  5. Participated in a One week FDP on “Recent Trends & Challenges in Deep Learning for Advancing Computer Vision” from 26th Feb to 1st March, organized by Dept. of ECE, VNRVJIET.

  6. Participated in a Five days Short Term course on “Biosignals, Communication and Applications” from 12th to 16th June 2023, organized by NIT Jalandhar.

  7. Participated in a 40-hour FDP on “AI/ML for Computer Vision and Medical Image Analysis Applications” sposored by MeitYGoI and organized by E&ICT Academy, NIT Warngal and Dept. of ECE, BVRIT HYDERABAD College of Engineering for Women during 3rd to 12th December 2022.

  8. Participated in Two-Week Online UGC sponsored Refresher course on “Internet of Things” held from 9th to 24th August 2021 by UGC-HRDC, JNTUH Hyderabad and successfully completed with A+ grade.

  9. Attended ATAL Online Elementary FDP on “Machine Learning Applications in Micro-Nano VLSI Technologies”, from 21st to 25th June 2021 at BVRIT HYDERABAD College of Engineering for Women.

  10. Participated in a Five day Faculty Development Program on “How to Write Good Research Article and Proposal” organized by BVRIT HYDERABAD College of Engineering for Women, Hyderabad from 18th to 22nd January 2021.

  11. Completed a course with distinction on “Online Teaching” conducted by IUCEE Team of Faculty from July to September 2020, organized by IUCEE.

  12. Attended a One Week FDP on “Wireless Communications & Mobile Technologies” organized by ECE Dept., BVRIT HYDERABAD College of Engineering for Women in association with QCares, Qualcomm from 6th to 10th July 2020 at BVRIT HYDERABAD College of Engineering for Women.

  13. Attended a One Week FDP on “Hardware Modeling Using Verilog” organized by NPTEL- AICTE from Aug-Oct 2019.

  14. Attended a 3 Day FDP on “Effective Engineering Teaching in Practice” organized by NPTEL – AICTE from Jan-Feb 2019.

  15. Participated in One Week Faculty Development Program on “Open-Source Software through Spoken Tutorials, IIT Bombay” organized by Department of IT, BVRIT HyderabadCollegeof EngineeringforWomen,from 4thto 10thNovember,2016.

  16. Attended a Three-day FDP on “Emerging Opportunities for Research and Development inVLSI“,organizedbyDepartmentofECE,19thto21stOctober2016,underIEEESB, BVRITH.

  1. Attended an AICTE Sponsored Two-week Faculty Development Program on “Recent Trends & Advancements in VLSI for Embedded Applications” organized by Dept. of ECE,CBIT, Hyderabadfrom 15thto 27th

Workshops – Attended

  1.  Participated in National level Online workshop on “Origin Software” on 28th May 2022, organized by Department of Basic Sciences & Humanities, BVRIT HYDERABAD College of Engineering for Women.

  2. Participated in a one-day workshop on “Unconscious Bias in the Workplace” on 1st May 2019 conducted by VEDIC,Hyderabad.

  3. Participated in a three-day workshop on “Inspire-Impact-Introspect-Level 1” held during 18th – 20th March 2019 at VEDIC, Hyderabad.

  4. Participated in a three-day workshop on “Think-Technology-Transform-Level 1” held during 19th – 21st April 2018 at VEDIC,Hyderabad.

  5. Attended a one-week workshop on “Integrated Circuit & System Design using CAD Tools” organized by ECE Dept., VNR VignanaJyothi Institute of Engineering & Technologyfrom 12thto17th

  6. Participated in a two-day workshop on “Mind Map for Effective Learning / Teaching” held during 6th – 7th June 2017 at VEDIC,Hyderabad.

  7. Participated in TEQIP-II sponsored workshop on “Embedded Hardware, Operating Systems &IoT Applications” organized by Department of ECE, VRNVJIET during 20th to 23rd

  8. Participated in a two-day workshop on “Sensors, Data Acquisition and Automation Control” under IEEE student branch, conducted by VI solutions, Bangalore, organized by Dept. of ECE, BVRITH in association with National Instruments Systems Pvt. Ltd., Bangalore on 12th& 13th

  9. Participated in “Assistive Technology Solutions in Minutes” workshop by ThereseWillkomm, Director of AT in NH, University of New Hampshire, USA on 26th and 27th December2013.

  10. Participated in a “Two Day Workshop on EDA Tools in Chip Design” with hands on experience on Cadence SoC Encounter at TIIT Pvt. Ltd. in association with Infotech Enterprises Limited, Hyderabad on 17th – 18th

  11. Participated in Two day DSP workshop at PVP Siddhartha Institute of Technology, Vijayawada, held on 3rdand 4th Marc

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